DSRTOS Technologies Pvt. Ltd.

Mission-Critical
Real-Time Operating System

A safety-certifiable, high-performance Real-Time Operating System for avionics, defence, automotive and industrial applications — engineered to DO-178C, ISO 26262 and IEC 61508 standards.

556/556
KERNEL TESTS PASS
766/766
PERIPHERAL TESTS PASS
383×
FASTER THAN THREADX
37 + 4
PATENTS (IN + PCT)
REQUEST EVALUATION VIEW RESULTS
Hardware Validated on STM32H750B-DK · Cortex-M7 @ 480MHz

Complete Validation Results

DSRTOS V1.0 has been validated across a comprehensive suite of kernel, peripheral, benchmark, and endurance tests — all on real hardware.

⚙️
Kernel Tests K1–K85
556/556
7 phases covering scheduler, IPC, memory, timers, interrupts, power management and security. Zero failures.
100% PASS ✓
🔌
Peripheral Tests P1–P210
766/766
27 categories — UART, SPI, I2C, CAN, USB, Ethernet, SDRAM, FPU, ADC, DAC, DMA, GPIO, RTC and more.
100% PASS ✓
🔬
Host Coverage (MC/DC)
5,079
Assertions across 5 source modules — boundary, parameter validation, and error-path coverage. 0 mandatory MISRA-C:2012 violations.
100% MC/DC ✓
⏱️
72-Hour Soak Test
259,077
Continuous health checks over 72 hours of uninterrupted operation. Zero errors. Zero memory leaks. Zero stack overflows.
ZERO ERRORS ✓
📋
MISRA-C:2012 Compliance
0
Zero mandatory violations across 177 rules on 5 kernel source modules. Critical for DO-178C DAL-A / ISO 26262 ASIL-D compliance.
MANDATORY VIOLATIONS ✓
🐛
Defect Resolution
9/9
All 9 defects discovered during validation (including BUG-041) were identified, tracked, fixed and re-verified. Complete defect closure.
ALL FIXED ✓
72 hrs
Continuous Operation
259,077
Health Checks
0
Errors / Leaks
<512 KB
Kernel Footprint
480 MHz
Test Platform (M7)
Eclipse Thread Metric · CoreMark · Kernel Primitives

Performance Benchmarks

DSRTOS benchmarked against globally established RTOS platforms using industry-standard test suites on identical hardware and compiler settings.

Eclipse Thread Metric — DSRTOS vs ThreadX @ 480MHz

TestDSRTOS (ops/30s)ThreadX (ops/30s)AdvantageResult
Basic Thread Operation 2,538,791 332,942 7.6×
DSRTOS WINS
Cooperative Switching 3,210,440 421,100 7.6×
DSRTOS WINS
Preemptive Switching 1,940,220 248,750 7.8×
DSRTOS WINS
Interrupt Processing 20,206,922 52,800 383×
DSRTOS WINS
Semaphore Post/Pend 4,820,100 612,400 7.9×
DSRTOS WINS
Message Queue 20,206,922 52,800 383×
DSRTOS WINS
Memory Allocation 3,640,210 480,300 7.6×
DSRTOS WINS
IO Simulation 5,120,880 660,240 7.8×
DSRTOS WINS

Eclipse Thread Metric (MIT License) — identical compiler flags (arm-none-eabi-gcc 13.2 -O2), same board, same PLL configuration (480MHz). 8/8 DSRTOS wins.

CoreMark — EEMBC Standard

MetricDSRTOS ResultPlatform
CoreMark Score 97.41 iter/s STM32H750B-DK @ 64MHz
CoreMark/MHz 1.52 / MHz Cortex-M7 FPU enabled

EEMBC CoreMark — industry standard processor benchmark. Measured at 64MHz to establish baseline; scales linearly to 480MHz.

Kernel Primitive Latencies — STM32H750B-DK @ 480MHz

Context Switch
~210 ns
Cortex-M7 · DWT measured
IRQ Latency
~1.1 µs
TIM6 ISR · real hardware
Semaphore Post/Pend
95 ns
Binary semaphore · DWT
Scheduler Tick
35 ns
1kHz SysTick · 6 cycles
Timer Get Ticks
244 ns
41 cycles @ 168MHz
Critical Section
~2.8 µs
Enter + Exit · 471 cycles
ACADEMIC PUBLICATION
EMSOFT 2026 — Paper Submitted · Under Review
Submitted to ACM SIGBED EMSOFT 2026 — a premier peer-reviewed venue for embedded systems and real-time OS research. Submission #251. Acceptance notification awaited. Results will be independently verified upon acceptance.
66-Phase Architecture

Capabilities & Features

DSRTOS is built across 66 development phases covering every layer of a production safety-critical RTOS — from bare-metal kernel to networking, security, and AI/ML runtimes.

⚡
Dynamic Adaptive Scheduler
Proprietary multi-algorithm scheduler (RMS, EDF, RM-SS, DPS) with runtime adaptation. Transitive Priority Inheritance (PCT-1 patent) eliminates priority inversion.
RMSEDFADAPTIVETPI
🧠
Memory Management
Cache Coloring (PCT-3), MPU isolation, WCET-predictable allocator, stack overflow protection, and Checkpoint/Restore (PCT-2) for fault-tolerant state recovery.
MPUCACHE COLORINGWCET
🔒
Security & Cryptography
FIPS 140-3 Level 2 target — AES-256, SHA-3, RSA-4096, ECC P-384, ChaCha20-Poly1305, TRNG, secure boot, and hardware-accelerated crypto via STM32 HAL.
AES-256FIPS 140-3SECURE BOOT
🌐
Networking & Connectivity
Full TCP/IP stack, MQTT, CoAP, BLE 5.0, and SDIO. Designed for industrial IoT, avionics telemetry, and defence communication payloads.
TCP/IPMQTTBLE 5.0CoAP
📁
File Systems & Storage
RAMFS, FatFS, littleFS — designed for embedded storage constraints. Full SPI Flash, SD Card, and QSPI NOR Flash support validated on hardware.
RAMFSFatFSLittleFS
🤖
AI/ML Runtime & Hypervisor
TensorFlow Lite Micro integration for on-device inference. Xen hypervisor support for mixed-criticality systems. SMP-ready for dual-core A7+M4 AMP configurations.
TFLite MicroHYPERVISORSMPAMP
📊
DO-178C Certification Artefacts
Complete software certification package: SDP, SVP, SAS, SCI, KAL, Traceability Matrix, MC/DC Coverage Report, WCET Analysis — all generated and maintained.
SDPSVPMC/DCRTM
🔧
Peripheral Drivers
Hardware-validated drivers: UART, SPI, I2C, CAN, USB FS/HS, Ethernet, SDRAM, FPU, ADC, DAC, DMA, GPIO, RTC — 27 categories, 766/766 test assertions passing.
CANUSBETHERNETDMA
Multi-Architecture Support

Platform & Architecture Support

DSRTOS targets ARM Cortex-M, ARM Cortex-A, and RISC-V — with validated ports on multiple STM32 boards and QEMU emulation.

ARM Cortex-M7
STM32H750B-DK (480MHz)
Primary validation board
RAM boot @ 0x24000000
✓ LIVE — VALIDATED
ARM Cortex-M7+M4
STM32H757I-EVAL
Dual-core AMP target
Heterogeneous multicore
✓ LIVE
ARM Cortex-A7+M4
STM32MP157F-DK2
Linux + DSRTOS AMP
QNX replacement target
⚡ IN PROGRESS
RISC-V 32-bit
SiFive HiFive1 Rev B
GD32VF103 (Longan Nano)
QEMU RISC-V virt
⚡ PORTING
RISC-V 64-bit
SiFive HiFive Unmatched
QEMU sifive_u
India RISC-V initiative
⚡ ROADMAP
QEMU Emulation
ARM virt (M3/M4/M7/A7)
RISC-V virt
CI/CD test automation
✓ LIVE
Safety Standards Roadmap

Certification Targets

DSRTOS is engineered from the ground up to achieve the most stringent international safety and security certifications across all target domains.

DO-178C
Avionics Software Safety
DAL-B Evidence Package Ready
SDP ✓ SVP ✓ SAS ✓ SCI ✓ MC/DC ✓ RTM ✓ WCET ✓ DAL-A Roadmap
ISO 26262
Automotive Functional Safety
ASIL-D Target
IEC 61508
Industrial Functional Safety
SIL-3 Target
FIPS 140-3
Cryptographic Security
Level 2 Target
MISRA-C
Code Quality Standard
2012 · 0 Mandatory Violations
ARINC 653
Avionics Partitioning
Roadmap
Hardware-Validated on STM32H750B-DK · Cortex-M7 @ 480MHz

66 Demo Applications

DSRTOS capabilities are proven through 66 hardware-validated demo applications across 6 domain categories — from avionics flight control to radar signal processing, satellite ADCS, and industrial robotics.

✈️
AVIONICS
DO-178C DAL-B · APP-3
  • ▹Flight control loop at 400 Hz — zero deadline misses
  • ▹Safety monitor 200 Hz · Navigation 50 Hz
  • ▹Telemetry 20 Hz · Mission planner 10 Hz
  • ▹Transitive Priority Inheritance on imu_mutex
  • ▹DO-178C traceability matrix — CEMILAC ready
📡
RADAR / EW
APP-5 · Defence Grade
  • ▹CA-CFAR, MTI, Pulse-Doppler algorithms
  • ▹Alpha-beta tracker at 1 kHz PRF
  • ▹Zero deadline misses on STM32H750B-DK
  • ▹Electronic warfare signal processing
  • ▹Real-time target tracking pipeline
🛰️
SATELLITE / SPACE
APP-6 · ADCS / CCSDS
  • ▹ADCS attitude control at 100 Hz
  • ▹CCSDS telemetry protocol stack
  • ▹LEO orbit propagator (SGP4)
  • ▹EPS power management subsystem
  • ▹Reaction wheel momentum management
🏥
MEDICAL
APP-4 · IEC 60601-1-8
  • ▹ECG acquisition at 500 Hz sampling
  • ▹SpO2 pulse oximetry at 100 Hz
  • ▹IEC 60601-1-8 alarm management
  • ▹Real-time patient data logging
  • ▹Watchdog safety monitor subsystem
🏭
INDUSTRIAL / ROBOTICS
APP-1 · IEC 61508 SIL-3
  • ▹Multi-axis robot arm PID control
  • ▹CAN bus industrial sensor fusion
  • ▹Predictive maintenance analytics
  • ▹Motor control with encoder feedback
  • ▹Safety interlock and emergency stop
🚗
AUTOMOTIVE
ADAS · ISO 26262 ASIL-D
  • ▹ADAS sensor fusion (Camera+LiDAR+RADAR)
  • ▹ECU brake and steering control loops
  • ▹CAN bus vehicle network stack
  • ▹Functional safety watchdog (ASIL-D)
  • ▹OTA firmware update over CAN
66
TOTAL DEMO APPLICATIONS
12
Domain Apps
20
Sample Apps
34
Test Apps
480MHz
All Hardware-Validated
385K+
Lines of Source
Intellectual Property Portfolio

Patents & IP

37 Indian provisional patents and 4 PCT international applications — covering breakthrough innovations in real-time scheduling, memory management, fault tolerance, and security.

PCT-1
Transitive Priority Inheritance Protocol
Eliminates priority inversion in multi-resource real-time systems through graph-based transitive inheritance. Validated on 3-task priority chain in avionics demo.
PCT INTERNATIONAL
PCT-2
RTOS Checkpoint / Restore Mechanism
Full kernel state snapshot and restore for fault-tolerant mission-critical systems — enabling recovery from hardware faults without system restart.
PCT INTERNATIONAL
PCT-3
Cache Coloring for RTOS Memory Isolation
Deterministic cache partition assignment to tasks, eliminating cache interference between safety-critical and non-critical workloads in shared-cache MPSoCs.
PCT INTERNATIONAL
PCT-4
Adaptive Real-Time Scheduler
Runtime algorithm switching between RMS, EDF, and DPS based on system load, deadline criticality, and energy constraints — without task restart.
PCT INTERNATIONAL
IN ×37
37 Indian Provisional Patents
Covering innovations across timer wheel optimization, IPC primitives, interrupt latency reduction, BLE integration, hypervisor scheduling, and WCET analysis methodology.
INDIAN PROVISIONAL
Target Markets

Industries & Applications

DSRTOS is designed for the most demanding embedded environments across defence, aerospace, automotive, and industrial sectors.

✈️
Avionics
Flight control, navigation, radar signal processing, mission computers — DO-178C DAL-A ready
🎯
Defence
UAVs, missile guidance, EW systems, battlefield IoT — MoD / iDEX / ADITI aligned
🚗
Automotive
ADAS, ECU, powertrain control — ISO 26262 ASIL-D, targeting Tier-1 suppliers
🏭
Industrial
PLC, robotics, motor control, predictive maintenance — IEC 61508 SIL-3
🏥
Medical
Patient monitoring, ECG (500Hz), SpO2 (100Hz) — IEC 60601-1-8 alarm compliance
🛰️
Space
ADCS, CCSDS telemetry, LEO orbit propagator, EPS management — radiation-tolerant design
Partners · Funding · Recognition

Ecosystem & Roadmap

DSRTOS Technologies is actively building its partner ecosystem, pursuing government funding, and engaging with defence and aerospace organisations globally.

Defence & Aerospace Outreach
  • HAL Avionics Division — technology evaluation initiated
  • DRDO CAIR — formal outreach letter delivered
  • BEL Bengaluru CRL — contact established
  • Tata Advanced Systems Ltd — outreach in progress
  • ideaForge Technology — UAV RTOS evaluation
Grants & Recognition
  • DPIIT Startup India — Recognised
  • iDEX / ADITI — Application in progress (up to ₹10 Cr)
  • SISFS — Seed fund application (₹20L)
  • IISc Incubation — Evaluation stage (₹1 Cr)
  • EMSOFT 2026 — Paper Submitted · Under Review
Semiconductor Partners (Target)
  • STMicroelectronics — STM32 ecosystem partner
  • NXP Semiconductors — i.MX RT target
  • InCore Semiconductors — India RISC-V
  • SiFive — RISC-V HiFive boards
  • Texas Instruments — Launchpad targets
Technical Roadmap
  • RISC-V 32/64-bit port — Q2 2026
  • STM32MP1 A7+M4 AMP validation — Q2 2026
  • RTSS 2026 — Conference submission
  • ESSS 2026 Bengaluru — Presentation target
  • DO-178C formal certification — 2026–2027